Instrumentation Amplifier Common-Mode Saturation Case Study

This case study follows a strain-gauge load-cell interface that failed calibration even though the bridge, ADC resolution, and nominal gain calculation looked correct. The root cause was not strain-gauge physics. It was analog front-end headroom: the instrumentation amplifier was asked to amplify a small differential bridge signal while its inputs and output were outside the valid range for the chosen supply, excitation, gain, and ADC reference.

The case is useful because this failure often hides behind apparently reasonable numbers. The differential signal may be only a few millivolts, but those millivolts ride on a common-mode voltage that the amplifier must tolerate. The amplified output must also fit inside the amplifier output swing and ADC input range.

Case Summary

Item	Engineering relevance
System	0 N to 200 N strain-gauge load-cell input on a small industrial controller.
Sensor	Full-bridge load cell, 2\ \text{mV/V} sensitivity at rated load.
Original excitation	5.0\ \text{V} bridge excitation.
Analog front end	Single-supply instrumentation amplifier, gain 200, 3.3\ \text{V} supply.
ADC	16 bit microcontroller ADC, 0 V to 3.3 V input range.
Failure observed	Calibration curve flattened above about 140 N and showed unstable zero return.
Hidden weakness	Bridge common-mode voltage and amplified output exceeded valid amplifier headroom.
Corrective action	Match bridge excitation, amplifier supply, input common-mode range, gain, reference voltage, ADC span, and validation limits as one measurement chain.

The central engineering question was:

Did the force sensor become nonlinear, or did the analog front end leave its linear operating region?

The answer was the analog front end.

Original Measurement Chain

The first design used:

1. a 5.0 V bridge excitation rail;
2. a full-bridge load cell;
3. shielded cable to the controller board;
4. an instrumentation amplifier powered from 3.3 V;
5. amplifier reference pin set to 1.65 V;
6. gain set to 200;
7. a 16 bit ADC with 0 V to 3.3 V input range.

The design review had checked ideal bridge output and ADC resolution. It had not checked the instrumentation amplifier input common-mode range at the selected gain and output level, and it had not left enough output swing margin near the ADC rail.

Step 1: Bridge Differential Signal

The load-cell sensitivity is:

At excitation:

the full-scale differential bridge output is:

For a 200 N rated load, the approximate bridge sensitivity is:

Engineering Comment

The differential output is small, but small signal size does not guarantee an easy analog design. The amplifier sees both the small differential signal and the much larger common-mode voltage created by the bridge excitation.

Step 2: Bridge Common-Mode Voltage

For a balanced bridge excited from 0 V to 5.0 V, both signal output nodes sit near half excitation when unloaded:

The selected instrumentation amplifier is powered from:

At gain 200 and output near midscale, the data-sheet valid input common-mode range is:

The bridge common-mode voltage is:

so the input stage is outside its specified operating region even before full-scale load is applied.

Engineering Comment

This is the first failure. A bridge signal can be electrically small and still be impossible for the amplifier to process on the chosen supply. Input common-mode range is not the same as ADC input range, and it is not guaranteed by the words “single supply” or “rail to rail” unless the data-sheet conditions match the design.

Step 3: Output Swing and ADC Clipping

The amplifier output equation is approximately:

The design uses:

At full-scale load:

The ADC input range ends at:

and the amplifier data sheet states that the output remains linear only to about:

The maximum differential input before output swing limit is:

Equivalent force:

Engineering Comment

This matches the calibration symptom: the curve begins to flatten above about 140 N. The ADC may not report a full digital overflow because the amplifier output can enter a nonlinear swing limit before the ADC code reaches its maximum.

Step 4: Why the Calibration Looked Like Sensor Nonlinearity

The calibration team observed:

• normal-looking zero reading on some power cycles;
• correct slope at low loads;
• reduced incremental slope above roughly 140 N;
• unstable zero return after high-load points;
• stronger error when the 3.3 V rail was at the low end of tolerance.

Those symptoms can be mistaken for load-cell hysteresis, fixture friction, mechanical overload, adhesive creep, or poor calibration weights. The decisive evidence was that the analog output, not the bridge itself, was leaving its valid range.

Diagnostic checks:

1. Measure the bridge output directly with a high-impedance differential instrument.
2. Measure both amplifier inputs relative to board ground.
3. Compare input common-mode voltage with the data-sheet allowed range.
4. Sweep a precision millivolt differential source at the same common-mode voltage.
5. Repeat at rail low, nominal, and high tolerance.
6. Record amplifier output and ADC code separately.

The direct bridge output stayed linear. The amplifier output did not.

Corrected Design Option

One correction is to make the bridge ratiometric to the ADC reference and reduce excitation to:

Then the bridge common-mode voltage is:

which lies inside the amplifier input common-mode range.

The full-scale bridge output becomes:

Use a reduced gain:

Then:

Output headroom to the linear high limit is:

The amplified sensitivity is:

For a 16 bit ADC over 0 V to 3.3 V:

The ideal force step from quantization alone is:

Engineering Comment

The ideal quantization step is far below the project resolution requirement. That does not mean the measurement is accurate to 0.0085\ \text{N}. Noise, offset, drift, bridge tolerance, fixture friction, temperature, calibration uncertainty, and mechanical repeatability will dominate. The corrected electronics simply remove a hard saturation error.

Alternative Corrections

Other valid corrections may be better in a product design:

Correction	When it is appropriate
Use an amplifier supply that supports the 5 V bridge common-mode range.	When 5 V excitation is required for signal level or legacy compatibility.
Select a bridge-specific ADC/PGA.	When low-noise ratiometric conversion and integrated diagnostics are valuable.
Shift the bridge excitation common-mode.	When the bridge, amplifier, and safety isolation allow it.
Reduce gain and use more ADC span or digital calibration.	When output swing is the limiting factor.
Use differential ADC inputs with proper common-mode range.	When the ADC front end can directly accept the bridge signal and excitation reference.

No correction should be accepted from schematic reasoning alone. It must be validated across rail tolerance, temperature, load range, common-mode range, and expected installation conditions.

Validation Evidence

The corrected release package should include:

Evidence	Purpose
Bridge node voltage measurements	Confirms actual common-mode and differential ranges.
Data-sheet operating-region overlay	Shows input common-mode and output swing are valid at gain and load.
Precision differential-source sweep	Separates amplifier behaviour from mechanical load-cell behaviour.
Rail tolerance test	Confirms operation at minimum and maximum analog supply.
Calibration loading and unloading curve	Checks linearity, hysteresis, and zero return.
ADC raw-code log	Confirms the ADC is not clipping or silently saturating.
Temperature soak	Checks offset drift, gain drift, bridge self-heating, and reference behaviour.
EMI and cable-motion check	Confirms the low-level input is not corrupted by installation effects.

The release decision should state the valid excitation voltage, gain, amplifier part, supply range, load range, ADC reference, firmware scaling, and calibration procedure. Changing any of those items reopens the analog headroom review.

Risk Review

Before correction, the system could report a believable but wrong force above the clipped region.

Condition	Severity	Occurrence	Detection	RPN
Original front end	7	4	6	7(4)(6)=168
Corrected and validated front end	7	2	2	7(2)(2)=28

Severity remains because a wrong force value can still affect process quality or overload decisions. The improvement comes from reducing occurrence and improving detection through explicit headroom checks and production tests.

Common Mistakes

• Checking bridge differential voltage but not bridge common-mode voltage.
• Assuming a 3.3 V amplifier can process any signal that lies between 0 V and 3.3 V.
• Treating ADC clipping as the only possible saturation limit.
• Choosing gain from full-scale signal only, without offset, overload, zero drift, and output swing margin.
• Ignoring rail tolerance and temperature effects on input/output headroom.
• Calibrating away low-load error while missing high-load nonlinearity from saturation.
• Replacing the load cell when the analog front end is the failing component.

Transferable Lesson

A low-level sensor interface is a chain of operating regions. The bridge, amplifier inputs, amplifier output, ADC input, reference voltage, firmware scaling, calibration model, and mechanical fixture must all remain valid at the same time.

For bridge sensors, the essential headroom questions are:

1. What is the differential signal range?
2. What is the input common-mode range at each load and excitation condition?
3. What output swing is required after gain and reference offset?
4. What ADC input range and calibration range remain after margins?
5. What validation proves the front end is linear before mechanical calibration is blamed?

The safest design review treats common-mode range and output swing as first-order requirements, not data-sheet details to check after the board is built.