Exercise set

Power and Sensor Interface Electronics Exercises

Worked electronic engineering exercises for power and sensor interfaces covering linear regulator loss, flyback energy, H-bridge conduction loss, shunt sensing, photodiode current, transimpedance gain, thermocouple voltage, op-amp gain, RC filters, ADC scaling, junction temperature, and validation evidence.

Branch: Electronic Engineering
Content: Exercise set
Updated: Jun 20, 2026
Revision: v1.1.0 · reviewed

These exercises practise power and sensor interface electronics as physical interface design. They cover linear regulator loss, flyback energy, H-bridge conduction loss, current shunt sensing, photodiode current, transimpedance gain, thermocouple voltage, op-amp gain, RC filtering, ADC scaling, junction temperature, and validation evidence.

The goal is not only to calculate circuit values. The goal is to decide whether the interface preserves the physical quantity, survives credible faults, limits heat, rejects interference, and produces evidence that firmware and production tests can trust.

Assume simplified screening models unless an exercise states otherwise. Real designs should also check component tolerances, temperature drift, common-mode range, input protection, cable length, leakage, PCB layout, grounding, EMC, calibration, diagnostics, and fault recovery.

How to Use These Exercises

For each calculation, define:

the physical signal, load, rail, or fault being handled;
the required accuracy, bandwidth, thermal limit, or protection threshold;
the layout, grounding, cable, and environmental assumptions;
the measurement or diagnostic evidence needed for release;
the safe response if the interface is outside limits.

The common mistake is validating only the schematic. Power and sensor interfaces are validated at the boundary between electronics, physics, firmware, cabling, enclosure, heat, and faults.

For each result, state whether it supports component derating, sensor accuracy, fault detection, thermal release, firmware scaling, production-test limits, or interface acceptance. A circuit value becomes engineering evidence only when it is tied to the physical installation and a defined safe response.

Exercise 1: Linear Regulator Dissipation

A linear regulator converts:

V_{in}=12\ \text{V}

to:

V_{out}=5\ \text{V}

for a load current:

I_{load}=0.18\ \text{A}

Calculate regulator dissipation:

P_D=(V_{in}-V_{out})I_{load}

and approximate efficiency:

\displaystyle \eta\approx\frac{V_{out}}{V_{in}}

Solution

Power dissipation:

P_D=(12-5)(0.18)=1.26\ \text{W}

Efficiency:

\displaystyle \eta=\frac{5}{12}=0.417

Therefore:

\eta=41.7\%

Engineering Comment

This regulator is thermally demanding for a small board. The design should check package thermal resistance, copper area, ambient temperature, input-voltage range, dropout, fault current, and whether a switching preregulator is required.

Exercise 2: Flyback Magnetizing Energy

A flyback converter has magnetizing inductance:

L_m=180\ \mu\text{H}

The peak primary current is:

I_{pk}=1.4\ \text{A}

Estimate stored energy per switching cycle:

\displaystyle E=\frac{1}{2}L_m I_{pk}^2

Solution

Convert:

L_m=180\times10^{-6}\ \text{H}

Compute:

\displaystyle E=\frac{1}{2}(180\times10^{-6})(1.4)^2

E=176.4\times10^{-6}\ \text{J}

Therefore:

E=176\ \mu\text{J}

Engineering Comment

The stored energy screen must be connected to switching frequency, output power, transformer saturation, leakage inductance, snubber stress, diode recovery, insulation, and thermal design. A flyback transformer is an energy-storage component, not an ideal transformer.

Exercise 3: H-Bridge Conduction Loss

An H-bridge drives a DC motor with RMS current:

I_{RMS}=2.5\ \text{A}

At any instant, current flows through two MOSFETs. Each MOSFET has on-resistance:

R_{DS(on)}=65\ \text{m}\Omega

Estimate total conduction loss:

P_{cond}=2I_{RMS}^2R_{DS(on)}

Solution

Convert:

R_{DS(on)}=0.065\ \Omega

Compute:

P_{cond}=2(2.5)^2(0.065)

P_{cond}=0.8125\ \text{W}

Engineering Comment

Conduction loss is only part of the thermal picture. Switching loss, body-diode conduction during dead time, gate-drive loss, PCB copper, airflow, motor stall, short circuit, and PWM duty cycle also matter.

Exercise 4: Current Shunt Voltage and Power

A low-side current shunt has resistance:

R_s=20\ \text{m}\Omega

The measured current is:

I=4.0\ \text{A}

Calculate shunt voltage and power dissipation.

Solution

Convert:

R_s=0.020\ \Omega

Voltage:

V_s=IR_s=4.0(0.020)=0.080\ \text{V}

Power:

P_s=I^2R_s=(4.0)^2(0.020)=0.32\ \text{W}

Engineering Comment

The 80 mV signal is measurable but vulnerable to ground offset and switching noise. Use Kelvin routing, suitable amplifier common-mode range, thermal derating, and fault-current review.

Exercise 5: Photodiode Current

A photodiode has responsivity:

R_\lambda=0.42\ \text{A/W}

Incident optical power is:

P_{opt}=35\ \mu\text{W}

Calculate photodiode current:

I_{ph}=R_\lambda P_{opt}

Solution

Convert:

P_{opt}=35\times10^{-6}\ \text{W}

Compute:

I_{ph}=0.42(35\times10^{-6})=14.7\times10^{-6}\ \text{A}

Therefore:

I_{ph}=14.7\ \mu\text{A}

Engineering Comment

Photodiode current depends on wavelength, bias, temperature, dark current, optical geometry, and ambient light. The interface should also check saturation, bandwidth, shielding, leakage, and calibration method.

Exercise 6: Transimpedance Amplifier Output

A photodiode current:

I_{ph}=14.7\ \mu\text{A}

flows into a transimpedance amplifier with feedback resistor:

R_f=68\ \text{k}\Omega

Estimate output voltage magnitude:

V_{out}=I_{ph}R_f

Solution

Convert:

I_{ph}=14.7\times10^{-6}\ \text{A}

R_f=68\times10^3\ \Omega

Compute:

V_{out}=(14.7\times10^{-6})(68\times10^3)=0.9996\ \text{V}

The output magnitude is about:

V_{out}=1.00\ \text{V}

Engineering Comment

The gain looks convenient, but TIA design must check stability, photodiode capacitance, feedback capacitance, op-amp input current, noise, output swing, recovery from overload, and board leakage.

Exercise 7: Thermocouple Voltage

A thermocouple has approximate sensitivity:

S=41\ \mu\text{V}/^\circ\text{C}

The measured junction is:

\Delta T=120^\circ\text{C}

above the cold junction. Estimate thermocouple voltage:

V=S\Delta T

Solution

Compute:

V=(41)(120)=4{,}920\ \mu\text{V}

Convert:

V=4.92\ \text{mV}

Engineering Comment

A few millivolts can be corrupted by offset, thermal gradients, connector materials, ground loops, EMI, and cold-junction compensation error. The layout and installation are part of the measurement system.

Exercise 8: Non-Inverting Op-Amp Gain

A non-inverting amplifier uses:

R_f=90\ \text{k}\Omega

and:

R_g=10\ \text{k}\Omega

Calculate gain:

\displaystyle A_v=1+\frac{R_f}{R_g}

Solution

Substitute:

\displaystyle A_v=1+\frac{90}{10}=10

The voltage gain is:

A_v=10

Engineering Comment

The ideal gain does not guarantee performance. Check input common-mode range, output swing, gain-bandwidth product, slew rate, offset, noise, stability with source impedance, and tolerance of the feedback resistors.

Exercise 9: RC Low-Pass Filter

A sensor input filter uses:

R=4.7\ \text{k}\Omega

and:

C=10\ \text{nF}

Estimate cutoff frequency:

\displaystyle f_c=\frac{1}{2\pi RC}

Solution

Convert:

R=4.7\times10^3\ \Omega

C=10\times10^{-9}\ \text{F}

Compute:

\displaystyle f_c=\frac{1}{2\pi(4.7\times10^3)(10\times10^{-9})}

f_c=3.39\ \text{kHz}

Engineering Comment

The filter may reduce EMI and aliasing, but it also adds phase delay and source impedance. Check sensor bandwidth, ADC acquisition time, tolerance, and whether the dominant interference is above the cutoff with enough attenuation.

Exercise 10: ADC Scaling for a Sensor

A pressure sensor interface maps:

0\ \text{bar}\rightarrow0.5\ \text{V}

and:

10\ \text{bar}\rightarrow4.5\ \text{V}

An ADC measurement reports:

V=2.9\ \text{V}

Estimate pressure using linear scaling.

Solution

Voltage span:

\Delta V=4.5-0.5=4.0\ \text{V}

Pressure span:

\Delta P=10\ \text{bar}

Pressure:

\displaystyle P=\frac{V-0.5}{4.0}(10)

\displaystyle P=\frac{2.9-0.5}{4.0}(10)=6.0\ \text{bar}

Engineering Comment

Scaling is only valid if excitation, reference voltage, sensor calibration, ADC offset, temperature drift, and fault detection are controlled. The firmware should distinguish valid low pressure from open wire, short circuit, or saturated amplifier.

Exercise 11: Junction Temperature of a Driver

A driver dissipates:

P_D=0.72\ \text{W}

The board-level thermal resistance estimate is:

\theta_{JA}=55^\circ\text{C/W}

Ambient temperature is:

T_A=60^\circ\text{C}

Estimate junction temperature:

T_J=T_A+P_D\theta_{JA}

Solution

Temperature rise:

\Delta T=0.72(55)=39.6^\circ\text{C}

Junction temperature:

T_J=60+39.6=99.6^\circ\text{C}

Engineering Comment

The estimate should be checked against derating, thermal shutdown, neighboring heat sources, copper area, duty cycle, enclosure temperature, and fault operation. Thermal validation should measure the real board.

Exercise 12: Interface Validation Evidence Completion

A power and sensor interface release package requires nine evidence items:

input voltage range tested;
rail transient response measured;
sensor calibration recorded;
open-sensor and short-sensor diagnostics tested;
thermal image at worst-case load;
EMI susceptibility check completed;
fault-current behavior documented;
production limits released;
firmware scaling version recorded.

Seven items are complete.

Calculate completion percentage and decide whether release is acceptable if all nine items are mandatory.

Solution

Completion fraction:

\displaystyle f=\frac{7}{9}=0.778

Convert:

f=77.8\%

Because all nine items are mandatory, the interface is not ready for release.

Engineering Comment

Missing evidence can turn a clean bench circuit into an unreliable product. Power and sensor interfaces need validation across input range, load, temperature, EMI, faults, calibration, firmware scaling, and production tests.

Review Checklist

When reviewing power and sensor interface evidence, ask:

Are power rails checked for startup, load transient, thermal stress, and fault behavior?
Are sensor signals protected against overload, open circuit, short circuit, leakage, EMI, and calibration drift?
Does filtering protect the measurement without hiding required dynamics?
Are op-amp, ADC, reference, and firmware scaling errors included in the error budget?
Are thermal estimates validated on the actual board and enclosure?
Are diagnostics specific enough to distinguish wiring, rail, sensor, amplifier, and firmware faults?
Are production limits tied to the same measurements used in design validation?
Are calibration coefficients, ADC references, firmware scaling, and diagnostic thresholds controlled by version?
Are overload, reverse polarity, open-wire, short-circuit, saturation, and recovery cases validated rather than assumed from nominal calculations?

Good interface electronics make physical signals trustworthy. The design is ready only when power, sensing, protection, firmware, layout, thermal behavior, and validation evidence agree.

REF