Exercise set

Analog Sensor Interface and Current Loop Exercises

Solved analog sensor interface exercises for instrumentation amplifiers, 4-20 mA loops, burden voltage, ADC range, excitation, CMRR and release checks.

Branch: Engineering Physics
Content: Exercise set
Updated: Jul 03, 2026
Revision: v1.0.0 · reviewed

These exercises focus on the electronics between a sensor and a usable engineering value. The goal is to check whether the analog interface preserves the measurement: excitation, gain, common-mode range, output swing, ADC range, loop burden, CMRR, filtering and diagnostics.

Assume simple linear circuits unless stated otherwise. Real interfaces also need input bias current, protection leakage, EMI, grounding, cable capacitance, isolation, fault detection, calibration, firmware scaling and failure-mode evidence.

Release Evidence Notes

Sensor interface release should prove both normal measurement and fault behavior. A loop can scale correctly at one point but saturate at high current, lose compliance voltage, clip the ADC, hide a broken wire, or fail under common-mode voltage. The release record should include range, headroom and diagnostic checks.

Engineering Boundary Notes

The analog interface is part of the measurement, not a transparent wire. It defines excitation, input impedance, bandwidth, common-mode range, output swing, noise, filtering, ADC range and diagnostic behavior. A sensor calculation is incomplete until the interface can prove that it preserves the relevant signal over the required range and failure modes.

Current loops are attractive because they tolerate voltage drop and provide live-zero diagnostics, but they still need compliance voltage. Barriers, long cables, input cards and cold-temperature resistance can push the transmitter into saturation at the high end. Commissioning should therefore test low point, span point, fault current and maximum-burden condition.

ADC systems need timing evidence. Multiplexers, input capacitance, source impedance and digital filters can create settling errors that look like process changes. If the data go into a controller, historian or validation record, the scaling and timing path should be documented from terminal to engineering units.

Common Release Mistakes

Do not validate an interface only at mid-scale. Saturation, compliance loss, clipping and diagnostic thresholds usually appear at endpoints or fault states. Do not assume an ADC count size is the measurement resolution if analog noise, reference drift or input settling is larger. Do not ignore common-mode range just because the differential signal is small. Bridge and thermocouple interfaces can fail from common-mode voltage while the differential calculation looks correct.

For current loops, always test live zero, high-end current, open-wire behavior and maximum burden. A loop that reads correctly on a bench can fail after installation through barriers, long cable runs, surge protection, input cards or cold-temperature resistance changes.

Validation Package Checklist

Minimum evidence should include input range, excitation, gain, common-mode limits, output swing, ADC scaling, source impedance, acquisition time, loop burden, supply margin, fault-current behavior and engineering-unit conversion. For control or safety use, include endpoint tests and one injected fault state, not only a mid-scale simulation. The final record should identify whether the limiting condition is sensor physics, analog electronics, loop wiring, ADC conversion or software scaling.

If the channel is later re-ranged in software, repeat the endpoint, diagnostic and saturation checks because the physical wiring may stay unchanged while the engineering decision boundary moves.

Scenario Map

Scenario	Exercises	Primary check	Engineering decision
Amplifier range	1, 2, 3, 4	gain, output swing, common-mode and CMRR	Decide whether the analog front end can measure the signal.
Current-loop scaling	5, 6, 7, 8	4-20 mA scaling, burden, supply compliance and fault current	Decide whether field wiring supports the transmitter.
ADC and filtering	9, 10, 11, 12, 13	ADC count, input range, RC cutoff, settling and slew	Decide whether digitized data are valid.
Release gates	14, 15, 16, 17, 18	excitation, cable drop, diagnostics, uncertainty and final acceptance	Release, derate or redesign the interface.

Exercise 1: Instrumentation Amplifier Gain

A bridge signal is $2.0\ \text{mV}$ and desired output is $1.0\ \text{V}$ . Find required gain.

Solution

\displaystyle G=\frac{1.0}{0.002}=500

Engineering Comment

High gain makes input offset and common-mode limits important.

Plausibility Check

Millivolts need hundreds of gain to become volts.

Exercise 2: Output Swing Check

The same amplifier gain is $500$ , but maximum bridge signal is $8.0\ \text{mV}$ . Output swing limit is $\pm 3.3\ \text{V}$ . Check saturation.

Solution

V_o=500(0.008)=4.0\ \text{V}

Since $4.0>3.3$ , it saturates.

Engineering Comment

The design may pass nominal load but fail overload or calibration points.

Plausibility Check

High gain times several millivolts can exceed a low-voltage rail.

Exercise 3: Common-Mode Headroom

An amplifier accepts input common-mode from $0.5$ to $3.5\ \text{V}$ . A bridge midpoint is $2.5\ \text{V}$ with disturbance $\pm 0.8\ \text{V}$ . Check range.

Solution

Minimum:

2.5-0.8=1.7\ \text{V}

Maximum:

2.5+0.8=3.3\ \text{V}

Both are inside $0.5$ to $3.5\ \text{V}$ .

Engineering Comment

Common-mode headroom must include cable faults, shield currents and excitation tolerance.

Plausibility Check

The disturbed range stays within the allowed range.

Exercise 4: CMRR Error

Common-mode voltage is $2.0\ \text{V}$ and CMRR is $100\ \text{dB}$ . Estimate input-referred error.

Solution

CMRR ratio:

10^{100/20}=100000

Error:

\displaystyle e=\frac{2.0}{100000}=20\ \mu\text{V}

Engineering Comment

At high gain, microvolt errors can be large compared with bridge signals.

Plausibility Check

Very high CMRR strongly attenuates common-mode voltage.

Exercise 5: 4-20 mA Scaling

A pressure transmitter spans $0$ to $10\ \text{bar}$ . What pressure corresponds to $12\ \text{mA}$ ?

Solution

\displaystyle f=\frac{12-4}{20-4}=0.5

p=0.5(10)=5\ \text{bar}

Engineering Comment

Scaling should be checked at zero, span and mid-range before controller tuning.

Plausibility Check

Mid-current maps to mid-range.

Exercise 6: Current from Process Value

For the same transmitter, what current corresponds to $7.5\ \text{bar}$ ?

Solution

Fraction:

\displaystyle f=\frac{7.5}{10}=0.75

Current:

I=4+0.75(16)=16\ \text{mA}

Solution

Signal span:

3.0-0.5=2.5\ \text{V}

Range use:

\displaystyle 100\frac{2.5}{5}=50\%

Engineering Comment

Leaving headroom helps faults but reduces effective resolution if excessive.

Plausibility Check

The signal uses half the ADC voltage range.

Exercise 11: RC Low-Pass Cutoff

A sensor input has $R=10\ \text{k}\Omega$ and $C=100\ \text{nF}$ . Find cutoff:

\displaystyle f_c=\frac{1}{2\pi RC}

Solution

RC=10000(100\times 10^{-9})=0.001\ \text{s}

f_c=159\ \text{Hz}

Engineering Comment

Filtering should be chosen from noise and bandwidth requirements, not only component convenience.

Plausibility Check

A one millisecond time constant gives a cutoff near $160\ \text{Hz}$ .

Exercise 12: Multiplexer Settling

An ADC input must settle for $5\tau$ . The input RC time constant is $20\ \mu\text{s}$ . Find minimum settling time.

Solution

t_s=5(20)=100\ \mu\text{s}

Engineering Comment

Multiplexed sensors can show channel-to-channel memory when acquisition time is too short.

Plausibility Check

Five time constants is a common settling screen.

Exercise 13: Slew-Rate Requirement

A signal must change $2.0\ \text{V}$ in $0.5\ \text{ms}$ . Find required slew rate.

Solution

\displaystyle SR=\frac{2.0}{0.5}=4.0\ \text{V/ms}

So:

SR=0.004\ \text{V}/\mu\text{s}

Engineering Comment

Slow op-amps can distort fast sensor events even when small-signal bandwidth looks acceptable.

Plausibility Check

Two volts over half a millisecond is only a few millivolts per microsecond.

Exercise 14: Excitation Voltage Drop

A bridge draws $20\ \text{mA}$ through cable resistance $8\ \Omega$ each way. Find round-trip voltage drop.

Solution

Round-trip resistance:

R=16\ \Omega

Drop:

V=0.020(16)=0.32\ \text{V}

Engineering Comment

Remote sensing or local regulation may be needed when excitation accuracy matters.

Plausibility Check

Cable resistance at tens of milliamps gives tenths of a volt.

Exercise 15: Broken-Wire Diagnostic

A current loop reads $3.6\ \text{mA}$ . Normal range is $4$ to $20\ \text{mA}$ . Classify.

Solution

Since:

3.6<4.0

the reading is below live zero and should be treated as a fault or underrange diagnostic.

Engineering Comment

Live-zero loops distinguish zero process value from wiring or transmitter fault.

Plausibility Check

Values below $4\ \text{mA}$ are outside the normal measurement span.

Exercise 16: Loop Noise as Process Noise

A $0$ to $10\ \text{bar}$ transmitter has $16\ \text{mA}$ span. Loop noise is $0.04\ \text{mA RMS}$ . Estimate pressure noise.

Solution

Pressure per mA:

\displaystyle \frac{10}{16}=0.625\ \text{bar/mA}

Noise:

0.04(0.625)=0.025\ \text{bar RMS}

Engineering Comment

Noise should be compared with control deadband, alarm margin and acceptance tolerance.

Plausibility Check

A small fraction of a milliamp maps to a small fraction of a bar.

Exercise 17: Interface Uncertainty RSS

Standard uncertainty terms are gain $0.10\%$ , ADC $0.05\%$ and reference $0.08\%$ of span. Combine.

Solution

u=\sqrt{0.10^2+0.05^2+0.08^2}=0.137\%\ \text{span}

Engineering Comment

Electronics uncertainty should be combined with sensor and calibration uncertainty.

Plausibility Check

The result is larger than the largest term but less than their sum.

Exercise 18: Analog Interface Release Gate

An interface has:

Check	Result	Gate
Output swing	$4.0\ \text{V}$	$\le 3.3\ \text{V}$
Loop compliance margin	$3\ \text{V}$	$\ge 2\ \text{V}$
ADC range use	$50\%$	$\ge 40\%$
Settling time	$100\ \mu\text{s}$	$\le 80\ \mu\text{s}$
Broken-wire diagnostic	present	present

Decide release status.

Solution

Output swing fails:

4.0>3.3

Settling time fails:

100>80\ \mu\text{s}

Loop compliance, ADC range use and diagnostics pass. The interface should not be released until gain/range and ADC acquisition timing are corrected.

Engineering Comment

The field loop can be healthy while the local front end still clips or settles incorrectly.

Plausibility Check

Two measurement-validity gates fail, so hold is consistent.

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