Glossary term

Deadline Miss

Engineering definition of deadline miss covering response-time margin, miss ratio, stale actions, real-time validation, degraded response and release evidence.

Definition

phenomenon

A deadline miss occurs when a task, message, control action, service request or safety response completes after the latest useful time defined for that operation.

Deadline misses matter in real-time firmware, operating systems, control software, industrial automation, packet networks, embedded buses, medical devices and safety interlocks because late work can be incorrect even when the computation is otherwise valid. A useful analysis states the start event, completion event, deadline, response time, margin, miss ratio, consequence of late completion, discard or degraded-mode rule and validation evidence.

A deadline miss occurs when a task, message, control action, service request or safety response completes after the latest useful time defined for that operation. The computation may be numerically correct, but it is late relative to the system contract.

Deadline misses matter in real-time firmware, operating systems, embedded buses, control systems, industrial automation, packet networks, medical devices, aircraft equipment and safety interlocks. A late actuator command, stale measurement, delayed fault response or expired service request can be worse than an explicit rejection because downstream logic may treat it as valid.

Deadline Boundary

The deadline must be tied to a start event and a completion event. For task:

\tau_i

let the start event occur at:

T_{start,i}

and completion occur at:

T_{done,i}

The response time is:

R_i=T_{done,i}-T_{start,i}

For relative deadline:

D_i

a deadline miss occurs when:

R_i>D_i

The boundary should state whether completion means computation finished, output register written, packet transmitted, actuator reached state, record committed or alarm delivered.

Response-Time Margin

Deadline margin is:

M_i=D_i-R_i

The operation passes when:

M_i\geq0

and misses when:

M_i<0

Positive average margin is not enough if tail response times cross the deadline. For safety or hard real-time claims, the relevant value is usually worst-case or bounded response, not the mean.

Miss Ratio

For:

N_{total}

observed releases or requests and:

N_{miss}

deadline misses, the measured miss ratio is:

\displaystyle p_{miss}=\frac{N_{miss}}{N_{total}}

This metric is useful for soft real-time services, but it is not sufficient for hard real-time safety claims. A single missed safety deadline may be unacceptable even if the miss ratio is small.

Stale Work and Discard Rules

Late work needs a policy. If a command or measurement has useful lifetime:

T_{valid}

and data age is:

t_{age}

then stale work should be rejected or degraded when:

t_{age}>T_{valid}

Without this rule, the system may execute old commands, apply stale control outputs, report misleading measurements or retry operations that the caller has already abandoned.

Worked Example

A control loop has deadline:

D=10.0\ \text{ms}

During a stressed release test:

N_{total}=5000

cycles are observed and:

N_{miss}=17

miss their deadline. The miss ratio is:

\displaystyle p_{miss}=\frac{17}{5000}=0.0034=0.34\%

The release criterion is:

p_{miss}\leq0.001

so the release fails. The worst observed response is:

R_{max}=12.4\ \text{ms}

The worst observed margin is:

M_{min}=10.0-12.4=-2.4\ \text{ms}

After reducing logging interference and bounding preemption latency, a repeat test has:

N_{miss,new}=0

and:

R_{max,new}=8.9\ \text{ms}

The new worst observed margin is:

M_{min,new}=10.0-8.9=1.1\ \text{ms}

The measured test now passes, but the release should still state workload, sample size and untested worst-case assumptions.

Validation Evidence

Useful evidence includes release timestamp, completion timestamp, deadline definition, response-time histogram, maximum observed response, miss count, miss cause, scheduler trace, queue depth, interrupt latency, preemption latency, blocking time, bus load, retry activity, watchdog state and degraded-mode behavior.

Validation should include worst credible phasing: communication bursts, diagnostic traffic, flash writes, high-priority interrupts, lock contention, thread-pool saturation, queue buildup, recovery actions and power or thermal states that affect timing.

Relationship To Neighbor Terms

Latency is delay. A deadline miss is a delay that crosses a defined latest-useful boundary. Jitter is variation in timing and can cause intermittent deadline misses. Preemption latency, interrupt latency, priority inversion, lock convoys, queueing and task starvation can all be causes. Watchdog timers may detect repeated misses, but they do not define the deadline by themselves.

Failure mode analysis should state the effect of a deadline miss. In some systems late data can be dropped safely. In others it must trigger degraded mode, safe state, alarm, retry suppression or shutdown.

Common Mistakes

The most common mistake is reporting average response time while hiding the misses. Another is defining a deadline without saying when the clock starts and stops. A third is counting only completed work and ignoring abandoned or cancelled late work. A fourth is fixing the symptom by increasing queue capacity, which may reduce drops while increasing stale responses.

A strong deadline-miss review states the timing boundary, deadline, response-time distribution, miss ratio, worst margin, consequence of late completion, mitigation and validation evidence.

REF

See also