Exercise set
PID Controller Tuning and Anti-Windup Exercises
Solved PID controller exercises for tuning, steady-state error, derivative filtering, saturation, anti-windup, sampling, margins and validation.
These exercises practise PID controller tuning as an engineering calculation, not as a table lookup. The goal is to connect proportional, integral and derivative action to steady-state error, transient response, actuator limits, sampling, filtering, anti-windup and validation evidence.
All examples use simplified single-loop models. Real PID commissioning also requires plant identification, sensor calibration, actuator checks, sign verification, safety limits, operating-point coverage and test data. A controller that gives a clean spreadsheet result can still fail if the loop sign is wrong, the actuator saturates, the sample time is too slow, the derivative term amplifies noise or the validation test omits disturbances.
How to use these exercises
Solve each problem in two passes. First, compute the requested PID gain, output, margin, saturation effect or sampled update. Second, decide whether the result would support release on real hardware or a real process.
Keep controller form explicit. A dependent form, an independent parallel form, a velocity form and a vendor PLC block may use different gain units. Copying gains between forms without conversion is one of the fastest ways to create a dangerous loop.
Release Evidence Notes
PID evidence should state the controlled variable, manipulated variable, error sign, controller form, gain units, sample time, actuator limits, anti-windup method, derivative filter, tuning method, operating case, disturbance case and acceptance criteria.
Validation should include setpoint steps, disturbance tests, saturation recovery, manual-to-auto transfer, sensor-noise checks, sample-time and delay review, actuator-rate review, gain and phase margin evidence, and a clear record of what changed after tuning.
Engineering Boundary Notes
These exercises use simplified single-loop models. They do not replace plant identification, safety review, actuator sizing, sensor calibration, interlock testing, nonlinear process review, multi-loop interaction study or field commissioning. A PID calculation is acceptable only when controller form, units, sign, limits and operating envelope match the installed implementation.
Common Release Mistakes
- copying PID gains between vendor forms without unit conversion;
- tuning on a small setpoint step while disturbances or saturation control the real loop;
- enabling integral action without anti-windup or manual-to-auto transfer checks;
- adding derivative action without sensor-noise and filter review;
- ignoring sample time, dead time, actuator rate limit and output clamps;
- releasing a loop because it is stable at one operating point while other ranges were not tested.
Scenario Map
| Scenario | Main calculation | Engineering decision |
|---|---|---|
| Controller form | gain conversion, units and signs | Avoid copying PID gains into the wrong implementation. |
| Tuning | IMC, Ziegler-Nichols, gain and time constants | Produce a defensible starting point, not a final unchecked setting. |
| Steady-state error | system type and integral action | Decide when integral action is required and when it adds risk. |
| Frequency margin | crossover, phase margin and delay | Check whether tuning leaves room for sampling, filtering and dead time. |
| Saturation | output limits, windup and recovery | Test whether the loop recovers when the actuator cannot follow the command. |
| Digital implementation | sampled integrator, derivative filter and update timing | Confirm that firmware timing matches the control assumption. |
| Release validation | multi-criterion pass/fail screen | Hold release when any margin, limit or evidence item is missing. |
Validation Package Checklist
- controlled variable, manipulated variable and loop sign are verified;
- controller form, gain units and sample time are documented;
- actuator limits, rate limits and anti-windup behavior are tested;
- derivative filter, sensor noise and quantization are reviewed;
- setpoint, disturbance, saturation and manual-to-auto tests are recorded;
- gain margin, phase margin, delay and operating-point coverage are checked;
- final release decision states accept, retune, restrict range or hold for commissioning.
Exercise 1: Convert dependent PID settings to parallel gains
A controller vendor gives the dependent PID form:
with:
Convert the settings to the parallel form:
Solution
Match coefficients term by term:
Substitute the values:
Engineering Comment
The numbers are not interchangeable labels. K_i in the parallel form has inverse-time units relative to the error-unit basis, while T_i is an integral time. Using T_i=4.0 as if it were K_i=4.0 would make the integral action five times stronger than intended.
Plausibility Check
The integral time is several seconds, so the parallel integral gain should be smaller than the proportional gain. The derivative time is less than one second, so the derivative gain should be smaller than the proportional gain in this unit convention. The converted values match that expectation.
Exercise 2: Compute a proportional output and check sign
A temperature loop uses:
where r is setpoint and y is measured temperature. At one instant:
The output increases heater power when u increases. Compute the proportional contribution and state whether the sign is sensible.
Solution
The error is:
The proportional contribution is:
The error is positive because the measured temperature is below the setpoint. A positive output increases heater power, so the sign is sensible for heating.
Engineering Comment
This is a loop-sign test. If the output increase instead opened a cooling valve, the same algebra would drive the process away from the setpoint. PID tuning should not begin until the error sign and actuator direction are verified.
Plausibility Check
The measured temperature is low, so the heater command should increase. A positive proportional output satisfies that physical expectation.
Exercise 3: Estimate steady-state error with proportional control
A unity-feedback loop uses proportional control:
and a first-order plant:
For K_p=3, estimate the final error for a unit step input.
Solution
The loop transfer function is:
For a type 0 unity-feedback system, the position error constant is:
The step steady-state error is:
The final error is about 14.3\% of the unit step.
Engineering Comment
Proportional gain reduces offset but does not eliminate it for this type 0 loop. Increasing K_p would reduce offset but can also reduce stability margin, increase overshoot and demand more actuator effort.
Plausibility Check
The plant static gain is 2, and the proportional gain is 3, so the DC loop gain is 6. An error near one seventh is plausible.
Exercise 4: Add integral action and check the characteristic equation
The same plant is controlled by:
with:
Find the closed-loop characteristic equation and determine whether the second-order denominator is stable.
Solution
The loop transfer function is:
The unity-feedback characteristic equation is:
Therefore:
Expand:
For a second-order polynomial:
stability requires all coefficients positive. Here:
All are positive, so the model is stable.
Engineering Comment
Integral action changes the loop type and can remove steady-state error for a step input, but it also adds a pole at the origin before closure. The stability check is therefore not optional.
Plausibility Check
The integral gain is modest relative to the proportional action. The stable result is plausible, but the damping and actuator demand still need separate checks.
Exercise 5: Choose IMC PI tuning for a first-order-plus-dead-time model
A process identification test gives a first-order-plus-dead-time model:
with:
Use the simple IMC-style PI rules:
with desired closed-loop time constant:
Find K_c, T_i and the parallel integral gain K_i=K_c/T_i.
Solution
The controller gain is:
The integral time is:
The parallel integral gain is:
Engineering Comment
The selected \lambda is larger than the dead time, so the tuning is intentionally moderate. A much smaller \lambda would demand faster response but would leave less margin for valve lag, measurement filtering and model error.
Plausibility Check
The process gain is greater than one and the process is relatively slow, so the controller gain is below one and the integral gain is small. That is consistent with a conservative process-loop tuning.
Exercise 6: Compute Ziegler-Nichols closed-loop PID settings
A relay test or cautious ultimate-gain test gives:
Using the classic closed-loop Ziegler-Nichols PID starting rules:
find K_c, T_i, T_d, and the parallel gains K_i=K_c/T_i and K_d=K_cT_d.
Solution
The dependent-form gain is:
The integral time is:
The derivative time is:
The parallel gains are:
and:
Engineering Comment
Ziegler-Nichols settings are starting points, not release settings. They often give an aggressive response. A real commissioning procedure should check overshoot, actuator effort, noise sensitivity, safety limits and robustness before accepting the result.
Plausibility Check
The ultimate gain is 6.0, and the suggested controller gain is 60\% of that value. That leaves some distance from sustained oscillation, but not necessarily enough for a noisy or delay-dominated process.
Exercise 7: Check derivative filter frequency
A derivative term uses the practical filtered form:
The derivative time is:
and the filter is chosen with:
Find \tau_f and the filter corner frequency:
Solution
The filter time constant is:
The corner frequency is:
Engineering Comment
The derivative path will still react strongly to measurement content below and around this frequency. If the sensor is noisy in that band, derivative action can create output chatter even when the model looks well damped.
Plausibility Check
A 0.04\ \text{s} filter is fast compared with a 0.40\ \text{s} derivative time, so a corner near 4\ \text{Hz} is reasonable.
Exercise 8: Estimate phase-margin loss from digital delay
A PID loop has crossover frequency:
The measured phase margin before digital implementation is:
Sampling, computation and output update add an effective delay:
Estimate the phase lag:
and the remaining phase margin.
Solution
The delay phase lag is:
The remaining phase margin is:
Engineering Comment
The loop may still be acceptable if the requirement is, for example, at least 40^\circ phase margin. It is not acceptable to ignore the delay simply because the continuous-time design looked stable.
Plausibility Check
The delay is small compared with one second, and the crossover is only 4\ \text{rad/s}, so a phase penalty of about 13^\circ is plausible.
Exercise 9: Compute saturation and windup during a heat-up event
A digital PI controller computes:
At one sample:
The actuator output is limited to:
Find the raw output, saturated output and saturation error:
Solution
The raw output is:
The actuator cannot exceed 100, so:
The saturation error is:
Engineering Comment
The controller is asking for more heat than the actuator can deliver. If the integrator continues to grow during this condition, the loop can overshoot after the process finally approaches setpoint.
Plausibility Check
The raw output exceeds the limit by 32 command units, so the saturated output must be exactly the upper limit. The negative saturation error correctly indicates that the actual actuator output is below the requested output.
Exercise 10: Apply back-calculation anti-windup
Use the saturation case from Exercise 9. The previous integrator state is:
The discrete integral increment from normal PI action is:
Back-calculation uses:
with:
Find the next integrator state.
Solution
From Exercise 9:
The anti-windup correction is:
The next integrator state is:
Engineering Comment
The normal integral action would have increased the integrator to 45.6. Back-calculation instead reduces it to 39.2 because the actuator is already saturated. This helps the loop recover when the process catches up.
Plausibility Check
The correction magnitude exceeds the normal integral increment, so the integrator should decrease. The computed result does decrease from 42 to 39.2.
Exercise 11: Decide whether conditional integration should hold
A controller uses conditional integration. The rule is:
- if the actuator is saturated high and the error would drive the command higher, hold the integrator;
- if the actuator is saturated high and the error would drive the command lower, allow integration.
At one sample:
The loop uses positive controller action: positive error increases output. Should the integrator update be held or allowed?
Solution
The actuator is saturated high because:
The error is positive, and positive error increases output. Therefore the normal integral update would drive the command even higher.
The integrator update should be held.
Engineering Comment
Conditional integration is simple and robust when the sign logic is documented. It can be unsafe if copied into a reverse-acting loop without rechecking the error and actuator direction.
Plausibility Check
The actuator is already at its upper limit. Integrating a positive error would ask for still more output. Holding the integrator is the physically sensible decision.
Exercise 12: Check bumpless manual-to-auto transfer
A loop is in manual mode with actual actuator output:
At the transfer instant:
For bumpless transfer, choose the integrator state I so that:
Find I.
Solution
Set the controller output equal to the manual output:
So:
and:
Engineering Comment
Tracking the manual output before automatic transfer prevents a command bump. Without this initialization, the loop could jump immediately to an actuator value unrelated to the operator’s current safe setting.
Plausibility Check
The proportional and derivative terms already contribute 9 command units. The integrator must supply the remaining 37 to match the manual output of 46.
Exercise 13: Compute an incremental PI update
A digital velocity-form PI controller updates the command as:
Given:
and previous output:
find \Delta u_k and u_k before saturation.
Solution
The proportional increment is:
The integral increment is:
The command increment is:
The new command is:
Engineering Comment
The output decreases because the error is falling. The integral term still pushes upward because the current error remains positive. This is typical PI behavior near a setpoint.
Plausibility Check
The error dropped by one unit, so a modest output decrease is expected. The final value is close to the previous command, not a large jump.
Exercise 14: Choose a sample time from bandwidth guidance
A speed loop is designed for approximate closed-loop bandwidth:
Use the rule that controller sampling frequency should be at least 20 times the bandwidth:
Find the maximum sample time:
Solution
The minimum sampling frequency is:
The maximum sample time is:
So:
Engineering Comment
This is only a starting rule. Encoder resolution, computation jitter, PWM update timing, sensor filtering and zero-order-hold delay can require a faster sample rate or a lower bandwidth.
Plausibility Check
A loop with a few-hertz bandwidth should not be updated only a few times per second. A sample time below about 17\ \text{ms} is consistent with the stated rule.
Exercise 15: Estimate setpoint weighting effect
A PID loop is at steady operation with:
The setpoint is then changed to:
The proportional gain is:
For the proportional setpoint-kick contribution:
compare the kick for \beta=1.0 and \beta=0.4.
Solution
The setpoint change is:
For \beta=1.0:
For \beta=0.4:
The reduced weighting cuts the proportional setpoint kick by:
Engineering Comment
Setpoint weighting reduces proportional kick on setpoint changes while retaining disturbance response through measured output feedback. The exact formula depends on the controller structure, so commissioning records should state the vendor form, not only the value of \beta.
Plausibility Check
Reducing \beta from 1.0 to 0.4 should reduce the setpoint kick to 40\% of its original value. The kick comparison gives 16/40=0.4.
Exercise 16: Check actuator headroom after tuning
A tuned controller produces a maximum expected output of:
on a design disturbance. The actuator limit is:
The release rule requires at least 15\% actuator headroom relative to full scale:
Does the test pass?
Solution
The tested maximum output is:
The allowed maximum output is:
Because:
the actuator-headroom screen passes.
The remaining headroom is:
or 18\% of full scale.
Engineering Comment
The loop has enough output margin for the tested disturbance, but this does not prove stability. Headroom should be checked together with phase margin, rate limits, saturation recovery and disturbance coverage.
Plausibility Check
The requirement is 15\% headroom and the test leaves 18\%, so the pass margin is only 3 percentage points. This is acceptable but not generous.
Exercise 17: Screen derivative noise amplification
A speed estimate has high-frequency noise with approximate RMS amplitude:
The discrete derivative uses:
with:
Estimate the derivative-output RMS caused by one-sample noise difference of 0.8\ \text{rpm}.
Solution
The noise slope estimate is:
The derivative output is:
Engineering Comment
A few output units of derivative noise may be acceptable for a wide actuator, but it may be unacceptable for a small valve, motor duty cycle or precision servo. The derivative filter and speed-estimation method should be validated with real data.
Plausibility Check
The sample time is very short, so even small one-sample noise produces a large numerical slope. The computed output chatter is therefore plausible.
Exercise 18: Decide whether a PID loop is ready for release
A commissioning test gives the following evidence for a PID temperature loop:
| Check | Requirement | Measured |
|---|---|---|
| Overshoot | \le 10\% | 8.5\% |
| Settling time | \le 90\ \text{s} | 84\ \text{s} |
| Phase margin | \ge 40^\circ | 43^\circ |
| Maximum output | \le 85\% | 88\% |
| Saturation recovery test | required | not performed |
Should the loop be released?
Solution
Check each requirement.
Overshoot passes:
Settling time passes:
Phase margin passes narrowly:
Maximum output fails:
The saturation recovery test is missing, so the anti-windup and recovery behavior are not validated.
The loop should not be released. It should be held for actuator-headroom correction, saturation recovery testing and review of whether the phase-margin result remains valid after retuning.
Engineering Comment
Release is controlled by the weakest required evidence, not by the average impression. A loop that tracks setpoints well can still fail in operation if it has no actuator headroom or if saturation recovery is untested.
Plausibility Check
Three checks pass, one numerical check fails and one required test is missing. Holding release is the conservative and technically defensible decision.
Review Checklist
Before accepting a PID controller, check:
- controlled variable, manipulated variable and feedback sign;
- controller form and gain units;
- setpoint weighting, derivative-on-measurement and derivative filter settings;
- sample time, computation delay, output update timing and jitter;
- actuator output limit, rate limit, deadband and fail state;
- anti-windup method and saturation recovery evidence;
- setpoint response, disturbance response and operating-point coverage;
- phase margin, gain margin or other robustness evidence;
- manual-to-auto transfer and startup/shutdown behavior;
- final settings, firmware or PLC version, and validation data.
Common Mistakes
- Copying PID gains between dependent and parallel forms without conversion.
- Tuning setpoint tracking while ignoring disturbance rejection.
- Adding integral action without checking stability and saturation.
- Using derivative action on a noisy measurement without filtering.
- Treating Ziegler-Nichols settings as final release values.
- Ignoring sample time, zero-order hold and computation delay.
- Accepting a simulation without actuator limits, rate limits or deadband.
- Failing to test manual-to-auto transfer.
- Reporting gains without units, controller form or sign convention.
- Releasing a loop without saturation and anti-windup recovery evidence.
The central habit is to treat PID tuning as a controlled engineering change. A good final answer is not only a set of gains; it is a documented loop boundary, tested implementation and defensible release decision.